- Reduced footprint.
By internally connecting the FPGA, the NAND flash and the mDDR, the Fusio-II module comes out
with a reduced pin count of 484 balls compared with the original FGPA footprint of 676 balls.
Considering the overall footprints of the memories, FPGA and decoupling capacitors, the Fusio-II does
provide a footprint reduction from 937 mm2 down to 361mm2 (without mention of extra layout space
for high speed signal integrity)
- Optimized module size.
Using its wafer stacking WDoD™ technology, 3D PLUS can embedded heterogeneous components
without interposer or bonding and therefore achieve the lowest possible form factor in all three
dimensions offering a module of only 19 x 19 x3.9mm.
- Fast time to market thanks to a validated subsystem.
As a fully tested and validated subsystem, the Fusio-II can be directly placed on a board and
connected to dedicated peripherals, significantly reducing design and test development times paving
the way to quick board derivatives.