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Rad-Hard Majority Voter (3DRC3508ES2861)

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Dedicated « error detected » indication are available (EDET_ij), in addition to external error input signals (EIN_ij). Cold sparing is supported allowing any redundant configuration, along with ESD protection on all inputs and outputs.

Featuring specific radiation effect mitigation techniques and utilizing space design derating rules, the Rad Hard by Design 3DRC3508ES2861 Majority Voter is an ITAR free product and features a SEL/SET LETth of 74.7 MeV.cm2/mg and a TID of 30 krad(Si).

The 3DRC3508ES2861 is manufactured with 3D PLUS space qualified stacking technology designed for high reliability applications and is available in a compact size and low weight SOP package.

Markus Schulte

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  • 1.65 V to 5.5 V voltage range
  • Input voltage up to 5.5 V at any Vcc
  • Provides logic-level down translation to Vcc
  • Cold sparing capability
  • Internal power-on reset (POR) circuitry
  • Power savings & low dissipated power
  • 13 ns maximum propagation delay on data at 3.3 V
  • Radiation Hardened design
  • TID > 30 krad(Si)
  • SEL and SET LETth > 74.7 MeV.cm2/mg
  • Operating temperature –55°C / +125°C

Description

The 3DRC3508ES2861 is an octal 3-input high-speed Majority Voter with integrated redundancy. Operating across a voltage supply range of 1.65 V to 5.5 V, it offers four dual 3-input voter gates, with individual error outputs.

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