Our State-of-the Art stacking technologies for SiP allow us to bring the best standard semiconductor devices and technologies in one single highly miniaturized package with almost no limit for the merging of heterogeneous technologies (Die – package – Passives).
Achieving a combination that cannot be realized with monolithic System-on-Chip (SoC) approaches, and, relying on a proven “first time right” design and development methodology, 3D Plus SiP stacks are more effective and have also a lower development cost and a faster time to market. More information
- Part list (final or preliminary)
- Block diagram (if available)
- Main electrical featues (voltages, currents, operating frequency, …)
- Power dissipated
- Module max size
- Module Mounting technology
- Module I/O number
- Other characteristics (environement specification, quantity, quality grade,…)