The 3DLV21721VS2622 Serializer with redundancy inside converts 21 bits of CMOS/TTL data into three LVDS data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every clock cycle, 21 bits of input data are sampled and transmitted. Nominal and Redundant LVDS output drivers can be shut off when Power-down is active. It is particularly well suited for use in high reliability, high speed data transmission applications, and easily achieved cross-coupling nominal and redundant system.

The 3DLV21721VS2622 is packaged in a 56 pin SOP.
PERSONAL CONSULTATION
From component selection to design-in: our sales team advises you in person, by phone, video call or on site. We will set aside 30 minutes for you.
PERSÖNLICHE BERATUNG
Von der Bauteilauswahl bis zum Design-in: Unser Vertriebsteam berät Sie persönlich, telefonisch, per Videokonferenz oder vor Ort. Wir nehmen uns 30 Minuten Zeit.