The 3DLV3204VS1618 is four CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.
The 3DLV3204VS1618 accepts low voltage (350 mV typical) differential input signals and translates them into 3V CMOS output levels.
The 3DLV3204VS1618 and companion line driver (3DLV3104VS1617) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.
