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Fusio RT SDRAM (3DMC0755)

The 3DMC0755 FUSIO RT 3L SDRAM is manufactured using 3D PLUS well-known integration technology designed for high speed circuit applications. It is particularly well suited for use in high reliability, high performance and high-density system applications, as a fully integrated Computer Core.

Markus Schulte

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This solution procures several key benefits:

  • NX1H35AS© : NG Medium Space European FPGA
  • STM C65-space Process technology
  • Leading Edge European FPGA
  • Significant board area reduction for customers designs
  • High Modularity (Pinout compatible with all FUSIO RT Family)
  • Proven radiation hardened design
  • Available with screening option for high reliability application

128 Mbit SPI NOR Flash Configuration memory with:

  • Integrated Triple Modular Redundancy (TMR) and Power Switch
  • Enhanced SEU and TID performances

More Features

  • 2 Gbits SDRAM computing memory
  • Power Supply: 1.2V, 2.5V, 3.3V
  • Configuration banks supplies: 2.5V, 3.3V
  • 483 pins module, 263 Multi-Standards users I/Os
  • High level of miniaturization : 483 ball BGA, 32 x 32mm² area, max. module weight = 22 g
  • Temperature Range: -40°C to +105°C

Radiation Tolerances:

  • TID = 40 krads
  • SEL immune up to LET > 60 MeV.cm2/mg

FUSIO RT 3L SDRAM Configuration: 3DMC0755

  • NG Medium Space European FPGA : NX1H35AS©
  • Integrated TMR non-volatile Flash NOR SPI memory of 128 Mbit each
  • 2 Gbit SDRAM memory :
    • 2 Gb (4 x 512 Mb)
    • Bus width = 32b
    • Max Frequency = 133 MHz
    • MaxData Rate = 4.2 Gb/s
  • BGA pitch = 1.27 mm
  • 483 pins module, 263 users I/Os
  • Additional Configurations:

    • FUSIO RT FULL Configuration: 3DMC0752
      FPGA + TMR FLASH NOR + FLASH NAND + SDRAM
    • FUSIO RT BASIC Configuration: 3DMC0753
      FPGA + FLASH NOR
    • FUSIO RT 3L NAND Configuration: 3DMC0754
      FPGA + TMR FLASH NOR + FLASH NAND (64 Gb)

    Description

    The 3DMC0755 FUSIO RT 3L SDRAM is the 3 layers configuration of a Computer Core integrating a space grade SRAM based FPGA with its configuration memory and additional computing memory SDRAM in one miniaturized module.

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